1. Field of the Invention
This invention generally relates to the field of computer architecture. More particularly, the present invention relates to a method and device that handles requests for changing system mode.
2. Description of the Prior Art
Nowadays, the graphics-intensive applications for computers such as personal computers (PCs) are increasingly becoming more popular. Such applications include high-end computer-aided drafting (CAD) applications, games, real-time video applications, as well as other applications. As the functionalities of these applications become more powerful, the applications require the computers on which they are run to render and execute graphics much more quickly. Also, as the typical resolution of computer screens has increased from 640×480 pixels to 800×600, 1024×768, 1280×1024 and even beyond and color information per pixel has expanded from 2 bits to 24, 32 and beyond, the processing demand placed on the computers for fast graphics execution has also grown.
In general, the typical computer relies on a graphics card, GFX, (also known as a video card, graphic accelerate card, display adapter, or among other terms) to assist it in displaying graphics on a display device. A graphics card generally includes a specialized processor or processors, which is/are tailor-made for graphics rendering, as well as an unspecific amount of memory. FIG. 1 illustrates a discrete-type computer system block diagram. A GFX 150 connecting to a frame buffer 160 is connected to a North Bridge 120 via the AGP bus. However, a graphics “card” also could be integrated within a single chip, such as a North Bridge, on the motherboard of a computer, as shown in FIG. 2 illustrating an integrated-type computer system block diagram. A GFX 1204 is integrated within a North Bridge 120. The graphics card of either the discrete-type computer system 100 (shown in FIG. 1) or the integrated-type computer system 200 (shown in FIG. 2) can directly request access to a system memory 140 (such as Rambus DRAM, SDR DRAM, DDR SDRAM or DDR SGRAM, etc.) through the memory controller 1202 in the North Bridge 120. In other words, the system memory access that is required by the graphics card does not need to go through the CPU 110.
Nevertheless, the computer system architectures shown in FIG. 1 and FIG. 2 are not the only two system architectures in use and there are also a few others, two examples of such other computer system architectures are shown in FIG. 3 and FIG. 4. The main differences between the computer system architectures of FIG. 3 and FIG. 4 and the computer system architectures of FIG. 1 and FIG. 2 are the placements of the memory controller (numbered 1202 in FIG. 1 and FIG. 2, but numbered 1102 in FIG. 3 and FIG. 4) and the system memory 140. The memory controller 1102 is integrated into the CPU 110 in the computer system architectures of FIG. 3 and FIG. 4, wherein the system memory 140 is coupled to the CPU 110 via the built-in memory controller 1102. That is, the system memory access requested by the graphics card has to go through not only the North Bridge 120 but also the CPU 110.
In addition, increased processor performance has often meant increased power consumption and shortened battery life (for mobile processor-based notebooks/laptops). However, power saving technique is a solution available now in most of the computer systems. When a state where an application program waits for input and a state where there is no input from an input device are continued for a predetermined time period, the supply of the clock from a CPU and the supply of power are stopped. Some applications require less processing power than others, and hence the power saving technique can control the level of the processor performance, dynamically adjusting the operation frequency and voltage many times per second according to the task on hand. By doing so, the power consumption is reduced to extend the operation time of batteries.
Besides, a processor performing states transitions causes both the CPU and the North Bridge clocks to ramp down, the CPU bus and V-Link to disconnect, and memories to enter self-refresh mode, to allow the core frequency and voltage to be dynamically changed in a mobile system. This provides a significant power saving but adding latency to the requests received from devices linked to the North Bridge. Further, the power saving technique often requires a period of a few microseconds to tens of microseconds for states transitions, such as to reduce the operation frequency. During the power saving process period, the CPU is in a complete idle state waiting for the alternation of the operation frequency, and hence the graphics card in the computer system architectures of FIG. 3 and FIG. 4, or any architecture having system memories directly coupled to the CPU, will not be able to request for system memory access through the CPU. That is, no image data can be obtained by the graphics card and displayed on the display device(s) during that period. Furthermore, as mentioned earlier, the operating frequency and voltage might be adjusted many times per second, and that means, within the time of one second, the graphics card might not be able to request the system memory access through the CPU in hundreds of power saving process periods.
In view of the drawbacks mentioned with the prior art of computer architectures, there is a continued need to develop a new and improved method and device that overcomes the disadvantages associated with the prior art of computer architectures. The advantages of this invention are that it solves the problems mentioned above.